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FDS7296N3 September 2004 FDS7296N3 30V N-Channel PowerTrench MOSFET General Description This N-Channel MOSFET in the thermally enhanced SO8 FLMP package has been designed specifically to improve the overall efficiency of DC/DC converters. Providing a balance of low RDS(ON) and Qg it is ideal for synchronous rectifier applications in both isolated and non-isolated topologies. It is also well suited for high and low side switch applications in Point of Load converters. Features * 15 A, 30 V RDS(ON) = 8 m @ VGS = 10 V RDS(ON) = 11 m @ VGS = 4.5 V * High performance trench technology for extremely low RDS(ON) * Optimized for low Qgd to enable fast switching and reduced CdV/dt gate coupling. * SO-8 FLMP for enhanced thermal performance in an industry-standard package outline. Applications * Secondary side Synchronous rectifier * Synchronous Buck VRM and POL Converters NC D NC D NC D NC D D 5 6 Bottom-side Drain Contact 4 3 2 1 Bottomless FLMP SO-8 SO-8 Pin 1 SO-8 G SG S S SS S TA=25oC unless otherwise noted 7 8 Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Parameter Ratings 30 20 (Note 1a) Units V V A W C 15 60 3.0 1.5 -55 to +150 Power Dissipation for Single Operation (Note 1a) (Note 1b) Operating and Storage Junction Temperature Range Thermal Characteristics RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 40 0.5 C/W C/W Package Marking and Ordering Information Device Marking FDS7296N3 2004 Fairchild Semiconductor Corporation Device FDS7296N3 Reel Size 13'' Tape width 12mm Quantity 2500 units FDS7296N3 Rev C(W) FDS7296N3 Electrical Characteristics Symbol WDSS IAR TA = 25C unless otherwise noted Parameter Drain-Source Avalanche Energy Drain-Source Avalanche Current Test Conditions Single Pulse, VDD = 27 V, ID=15 A Min Typ Max Units 189 15 mJ A Drain-Source Avalanche Ratings Off Characteristics BVDSS BVDSS TJ IDSS IGSS Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage (Note 2) VGS = 0 V, ID = 250 A 30 28 1 100 V mV/C A nA ID = 250 A, Referenced to 25C VDS = 24 V, VGS = 0 V VGS = 20 V, VDS = 0 V ID = 250 A On Characteristics VGS(th) VGS(th) TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, 1 1.8 -0.5 6.5 8.2 9.7 58 3 V mV/C ID = 250 A, Referenced to 25C VGS = 10 V, ID = 15 A ID = 13 A VGS = 4.5 V, VGS = 10 V, ID = 15 A,TJ = 125C VDS = 10 V, ID = 15 A 8 11 13 m gFS S Dynamic Characteristics Ciss Coss Crss RG Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VGS = 15 mV, VDD = 15 V, VGS = 10 V, f = 1.0 MHz VDS = 15 V, f = 1.0 MHz V GS = 0 V, 1540 430 140 1.0 pF pF pF Switching Characteristics (Note 2) td(on) tr td(off) tf Qg Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 15 V, ID = 15 A, VGS = 5 V VDS = 15 V, ID = 15 A, VGS =10 V ID = 1 A, RGEN = 6 10 4 27 14 12.7 23 4.2 3.5 20 9 44 25 18 32 ns ns ns ns nC nC nC nC Drain-Source Diode Characteristics and Maximum Ratings IS VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward VGS = 0 V, IS = 2.5 A Voltage IF = 15 A, Diode Reverse Recovery Time Diode Reverse Recovery Charge diF/dt = 100 A/s 2.5 (Note 2) A V nS nC 0.7 27 19 1.2 FDS7296N3 Rev C(W) FDS7296N3 Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a) 40C/W when mounted on a 1in2 pad of 2 oz copper b) 85C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% FDS7296N3 Rev C(W) FDS7296N3 Typical Characteristics 60 2 VGS =10V 4.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 3.5V 6.0V 4.5V 1.8 VGS = 3.5V 50 ID, DRAIN CURRENT (A) 40 1.6 4.0V 4.5V 1.2 5.0V 6.0V 1 10V 30 1.4 20 3.0V 10 0 0 0.25 0.5 0.75 1 VDS, DRAIN-SOURCE VOLTAGE (V) 1.25 1.5 0.8 0 10 20 30 40 ID, DRAIN CURRENT (A) 50 60 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.022 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 15A VGS = 10V 1.4 ID = 7.5A RDS(ON), ON-RESISTANCE (OHM) 0.018 1.2 0.014 1 TA = 125oC 0.01 0.8 TA = 25oC 0.6 -50 -25 0 25 50 75 100 o TJ, JUNCTION TEMPERATURE ( C) 125 150 0.006 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 3. On-Resistance Variation withTemperature. 60 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VDS = 5V IS, REVERSE DRAIN CURRENT (A) 50 ID, DRAIN CURRENT (A) VGS = 0V 10 TA = 125oC 40 1 30 0.1 25 C o 20 TA =125 C o -55oC 0.01 -55 C o 10 0.001 25oC 0 1.5 2 2.5 3 3.5 VGS, GATE TO SOURCE VOLTAGE (V) 4 0.0001 0 0.2 0.4 0.6 0.8 1 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS7296N3 Rev C(W) FDS7296N3 Typical Characteristics 10 VGS, GATE-SOURCE VOLTAGE (V) ID = 15A 8 CAPACITANCE (pF) VDS = 10V 6 20V 2000 f = 1MHz VGS = 0 V 1600 Ciss 1200 4 15V 800 Coss 400 2 Crss 0 0 5 10 15 Qg, GATE CHARGE (nC) 20 25 0 0 5 10 15 20 25 VDS, DRAIN TO SOURCE VOLTAGE (V) 30 Figure 7. Gate Charge Characteristics. 1000 P(pk), PEAK TRANSIENT POWER (W) 50 Figure 8. Capacitance Characteristics. ID, DRAIN CURRENT (A) 100 RDS(ON) LIMIT 1ms 10ms 100ms 1s 10s DC VGS = 10V SINGLE PULSE o RJA = 85 C/W TA = 25oC 100s 40 SINGLE PULSE RJA = 85C/W TA = 25C 10 30 1 20 0.1 10 0.01 0.01 0.1 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) 100 0 0.01 0.1 1 10 t1, TIME (sec) 100 1000 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RJA(t) = r(t) * RJA RJA = 85 C/W 0.1 0.1 0.05 0.02 P(pk) t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 0.01 0.01 0.001 0.0001 SINGLE PULSE 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDS7296N3 Rev C(W) FDS7296N3 Dimensional Outline and Pad Layout FDS7296N3 Rev C(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM FAST ActiveArrayTM FASTrTM BottomlessTM FPSTM CoolFETTM FRFETTM CROSSVOLTTM GlobalOptoisolatorTM DOMETM GTOTM EcoSPARKTM HiSeCTM E2CMOSTM I2CTM EnSignaTM i-LoTM FACTTM ImpliedDisconnectTM FACT Quiet SeriesTM ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC Across the board. Around the world.TM OPTOPLANARTM PACMANTM The Power Franchise POPTM Programmable Active DroopTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench QFET QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM SILENT SWITCHER SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic TINYOPTOTM TruTranslationTM UHCTM UltraFET VCXTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I13 |
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